Technical Papers
Kathryn has published more than 60 technical papers in peer-reviewed journals and technical conference proceedings, including a book and book chapters.
Polymer self assembly in semiconductor microelectronics
IBM Journal of Research and Development
Opportunities and challenges of germanium channel MOSFETs
Book Chapter in “Advanced Gate Stacks for High-Mobility Semiconductors,” Published by Springer
Germanium channel MOSFETs: Opportunities and challenges
IBM Journal of Research and Development
Effect of tensile uniaxial stress on the electron transport properties of deeply scaled FD-SOI n-type MOSFETs
IEEE Electron Device Letters
Highly porous silicon membrane fabrication using polymer self-assembly
Journal of Vacuum Science & Technology B
Enabling SOI-based assembly technology for three-dimensional (3D) integrated circuits (ICs)
IEEE International Electron Devices Meeting
Effect of contact liner stress in high-performance FDSOI devices with ultra-thin silicon channels and 30 nm gate lengths
IEEE International SOI Conference
Stable SRAM cell design for the 32 nm node and beyond
IBM Journal of Research and Development
Mobility and CMOS devices/circuits on sub-10nm [110] ultra thin body SOI
Symposium on VLSI Technology
Ultra-thin SOI replacement gate CMOS with ALD TaN/high-k gate stack
Symposium on VLSI Technology
High performance FDSOI CMOS technology with metal gate and high-k
Symposium on VLSI Technology
Aggressively scaled (0.143 um2) 6T-SRAM cell for the 32 nm node and beyond
IEEE International Electron Devices Meeting
Wafer bonding for high-performance logic applications
Book Chapter in “Wafer Bonding: Applications and Technology,” Published by Springer
High-capacity, self-assembled metal-oxide-semiconductor decoupling capacitors
IEEE Electron Device Letters
Enabling technologies for wafer-level bonding of 3D MEMS and integrated circuit structures
Electronic Components and Technology Conference
Channel design and mobility enhancement in strained germanium buried channel MOSFETs
Symposium on VLSI Technology
Selectively formed high mobility strained Ge PMOSFETs for high performance CMOS
IEEE International Electron Devices Meeting
Structural evolution of cylindrical-phase diblock copolymer thin films
Journal of Polymer Science
Scattering study on the selective solvent swelling induced surface reconstruction
Macromolecules
Self-aligned n-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric and tungsten gate
IEEE Electron Device Letters
Fabrication, device design, and mobility enhancement of germanium channel MOSFETs
Solid-State and Integrated Circuits Technology
Three dimensional CMOS devices and integrated circuits
IEEE Custom Integrated Circuits Conference
High-quality crystalline layer transfer from a silicon-on-insulator substrate onto a sapphire substrate using wafer bonding
Journal of Electronic Materials
Does line-edge roughness matter?: FEOL and BEOL perspectives
Advances in Resist Technology and Processing
Block copolymer surface reconstruction: A reversible route to nanoporous films
Advanced Functional Materials
Electrical integrity of state-of-the-art 0.13um SOI CMOS devices and circuits transferred for three-dimensional (3D) integrated circuit (IC) fabrication
IEEE International Electron Devices Meeting
Process integration of self-assembled polymer templates into silicon nanofabrication
Journal of Vacuum Science & Technology B
Integration of self-assembled diblock copolymers for semiconductor capacitor fabrication
Applied Physics Letters
Nanoscale patterning using self-assembled polymers for semiconductor applications
Journal of Vacuum Science & Technology B
Triple-self-aligned, planar double-gate MOSFETs: devices and circuits
IEEE International Electron Devices Meeting
Ultrahigh-density nanowire arrays grown in self-assembled diblock copolymer templates
Science